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From The Free On-line Dictionary of Computing (05 January 2017) [foldoc]:
PowerPC
PPC
(PPC) A RISC microprocessor designed
to meet a standard which was jointly designed by Motorola,
IBM, and Apple Computer (the PowerPC Alliance). The
PowerPC standard specifies a common {instruction set
architecture} (ISA), allowing anyone to design and fabricate
PowerPC processors, which will run the same code. The PowerPC
architecture is based on the IBM POWER architecture, used in
IBM's RS/6000 workstations. Currently IBM and
Motorola are working on PowerPC chips.
The PowerPC standard specifies both 32-bit and 64-bit data
paths. Early implementations were 32-bit (e.g. {PowerPC
601}); later higher-performance implementations were 64-bit
(e.g. PowerPC 620). A PowerPC has 32 integer registers (32-
or 64 bit) and 32 floating-point (IEEE standard 64 bit)
floating-point registers.
The POWER CPU chip and PowerPC have a (large) common core, but
both have instructions that the other doesn't. The PowerPC
offers the following features that POWER does not:
Support for running in little-endian mode.
Addition of single precision floating-point operations.
Control of branch prediction direction.
A hardware coherency model (not in Book I).
Some other floating-point instructions (some optional).
The real time clock (upper and lower) was replaced with the
time base registers (upper and lower), which don't count in
sec/ns (the decrementer also changed).
64-bit instruction operands, registers, etc. (in 64 bit
processors).
See also PowerOpen, PowerPC Platform (PReP).
{IBM PPC info
(http://fnctsrv0.chips.ibm.com/products/ppc/index.html)}.
(gopher://info.hed.apple.com/), "Apple Corporate News/"
(press releases), "Apple Technologies/" and "Product
Information/". (gopher://ike.engr.washington.edu/), "IBM
General News/", "IBM Product Announcements/", "IBM Detailed
Product Announcements/", "IBM Hardware Catalog/".
Usenet newsgroups: comp.sys.powerpc,
comp.sys.mac.hardware.
["Microprocessor Report", 16 October 1991].
(1994-09-30)